Unit 22: Semiconductor Devices

PN Junction

A PN junction is formed by joining a p‑type semiconductor (rich in holes) with an n‑type semiconductor (rich in electrons). When the two materials are brought into contact, electrons diffuse from the n‑side to the p‑side and holes diffuse from the p‑side to the n‑side. This diffusion leaves behind uncovered donor ions on the n‑side and acceptor ions on the p‑side, creating a region depleted of free charge carriers known as the depletion region.

The built‑in electric field that arises across this region opposes further diffusion of carriers. The potential difference associated with this field is called the built‑in potential (Vbi). At equilibrium, the drift current caused by the field balances the diffusion current, resulting in zero net current.

Key Parameters and Formula

• Depletion width (W) depends on doping concentrations and applied voltage:

where εs is the semiconductor permittivity, q the electronic charge, VA the applied bias (positive for forward bias), NA and ND are acceptor and donor concentrations.

• Built‑in potential:

with k Boltzmann’s constant, T absolute temperature, and ni intrinsic carrier concentration.

Diagram description (textual): Imagine a vertical slab split into two halves; the left half labelled “p‑type” with “+” (ionized acceptors) and the right half labelled “n‑type” with “–” (ionized donors). The middle narrow region, devoid of mobile carriers, is the depletion region, with electric field lines pointing from n‑side to p‑side.

Applications

• Forms the basic building block of diodes, transistors, solar cells, and LEDs.
• Utilized in voltage‑dependent capacitance devices (varactors).

Semiconductor Diode

A semiconductor diode is essentially a PN junction with two terminals: the anode (p‑side) and the cathode (n‑side). Its behavior under external bias exhibits strong asymmetry, enabling rectification.

Bias Conditions

• Forward bias: The p‑side is connected to the positive terminal and the n‑side to the negative terminal of a voltage source. The applied voltage reduces the built‑in barrier, narrowing the depletion region. Majority carriers can now cross the junction easily, resulting in low resistance and a significant forward current (IF).
• Reverse bias: The polarity is reversed, increasing the barrier width. The depletion region widens, restricting majority carrier flow. Only a small leakage current (IR) due to minority carriers flows, giving high resistance.

Current‑Voltage (V‑I) Characteristics

The diode equation describes the ideal behavior:

where:

• IS = saturation current (strongly temperature dependent)
• V = voltage across diode (positive for forward bias)
• n = ideality factor (typically 1–2)
• VT = thermal voltage = kT/q ≈ 26 mV at 300 K

In forward bias (V ≫ VT) the exponential term dominates, giving an exponential rise of current. In reverse bias (V negative large magnitude) the exponential term tends to zero, leaving I ≈ –IS (the small leakage).

Applications

• Rectifiers (half‑wave, full‑wave, bridge)
• Clipping and clamping circuits
• Voltage regulators (Zener diodes)
• Signal demodulation in communication systems
• Protection circuits (reverse polarity)

Diagram description (textual): A simple schematic shows a triangle pointing to a line (the classic diode symbol). The triangle’s base is the anode (p‑side) and the line is the cathode (n‑side). Arrows indicate conventional current flow direction (from anode to cathode) when forward biased.

Full Wave Rectification

Rectification converts alternating current (AC) into direct current (DC). A full‑wave rectifier utilizes both halves of the AC cycle, producing a pulsating DC output with a frequency twice that of the input.

Center‑Tapped Transformer Configuration

The most common full‑wave rectifier uses a center‑tapped transformer and two diodes:

1. The secondary winding of the transformer is split into two equal halves, with a common center tap.
2. One diode (D1) connects the upper half‑winding to the load; the other diode (D2) connects the lower half‑winding to the load.
3. The cathodes of both diodes are tied together and feed the load resistor (RL); the anodes are connected to the opposite ends of the secondary.
4. The center tap is grounded (or connected to the negative side of the load).

During the positive half‑cycle of the transformer secondary voltage, the upper half is positive relative to the center tap, forward‑biasing D1 and reverse‑biasing D2. Current flows through D1 to the load. During the negative half‑cycle, the lower half becomes positive, forward‑biasing D2 and reverse‑biasing D1, again directing current through the load in the same direction. Thus, both halves contribute to unidirectional current.

Output Waveform and Frequency

If the input AC voltage is Vin(t) = Vm sin(ωt), the rectified output (ignoring diode drop) is:

This waveform consists of successive positive half‑sine pulses. The fundamental frequency of the output is 2f, where f is the input line frequency (e.g., 100 Hz for a 50 Hz mains supply).

Ripple Factor and Filtering

The pulsating DC contains an AC component called ripple. For a center‑tapped full‑wave rectifier without filtering, the ripple factor (γ) is:

To obtain smoother DC, a filter capacitor (C) is placed across the load. The ripple voltage approximate expression is:

where IL is the load current and f the line frequency (note the factor 2 because the rectified frequency is doubled).

Applications

• Power supplies for electronic equipment
• Battery charging circuits
• DC motor drives
• Signal demodulation in AM receivers

Diagram description (textual): Draw a transformer with a center tap on the secondary winding. Label the upper end “A”, lower end “B”, and center tap “CT (ground)”. Connect diode D1 between A and the load resistor, diode D2 between B and the load resistor, with both cathodes tied to the top of the load. The load’s bottom connects to CT. Indicate AC input across the primary and the pulsating DC across the load.

Logic Gates

Logic gates are the fundamental building blocks of digital circuits, implementing Boolean functions using electronic switches (typically transistors). Each gate has one or more binary inputs and a single binary output, defined by a truth table.

Basic Gates

• NOT (Inverter): Output is the logical inverse of the input. Symbol: a triangle with a small circle at the tip. Boolean expression: Y = Ā (Ā denotes NOT A).
• OR: Output is 1 if any input is 1. Symbol: a curved shape with ≥2 inputs. Boolean expression: Y = A + B (for two inputs).
• AND: Output is 1 only if all inputs are 1. Symbol: a D‑shaped block. Boolean expression: Y = A·B.

Universal Gates

• NAND: NOT of AND. Symbol: AND shape with a small circle at the output. Boolean expression: Y = Ā·B̄ (or Y = ¬(A·B)). NAND is universal because any other gate can be constructed using only NAND gates.
• NOR: NOT of OR. Symbol: OR shape with a small circle at the output. Boolean expression: Y = Ā + B̄ (or Y = ¬(A + B)). NOR is also universal.

Truth Tables

Below are the truth tables for the two‑input versions of each gate.

Applications

• Combinational logic: adders, multiplexers, decoders, encoders.
• Sequential logic: flip‑flops, counters, shift registers (built from gates).
• Microprocessors and memory units.
• Digital signal processing and control systems.

Diagram description (textual): For each gate, sketch the standard symbol: NOT as a triangle with a bubble at the point; AND as a D‑shape; OR as a curved shape; NAND as AND with a bubble at output; NOR as OR with a bubble at output. Label inputs A, B and output Y.

Summary

This chapter has detailed the formation and electrical properties of PN junctions, the rectifying behavior of semiconductor diodes, the operation of full‑wave rectifiers using center‑tapped transformers, and the functional logic of basic and universal gates with their truth tables. Understanding these concepts provides a foundation for studying electronic devices, power supplies, and digital systems that are pivotal in modern technology.