2. Digital Logic and Microprocessor (AExE02)
Computer Engineering - Nec (Nepal Engineering Council)
No MCQ questions available for this chapter.
Chapters
- 1. Concept of Basic Electrical and Electronics Engineering (AExE01)
- 2. Digital Logic and Microprocessor (AExE02)
- 3. Programming Language and Its Applications (ACtE03)
- 4. Computer Organization and Embedded System (ACtE04)
- 5. Concept of Computer Network and Network Security System (ACtE05)
- 6. Theory of Computation and Computer Graphics (ACtE06)
- 7. Data Structures and Algorithm, Database System, and Operating System (ACtE07)
- 8. Software Engineering and Information System (ACtE08)
- 9. Artificial Intelligence, Data Science, and Internet of Things (ACtE09)
- 10. Project Management and Innovation (ACtE10)
2.1 Digital Logic (AExE0201)
Number Systems
- Binary (Base-2): Uses digits 0 and 1.
- Octal (Base-8): Uses digits 0-7.
- Decimal (Base-10): Uses digits 0-9.
- Hexadecimal (Base-16): Uses digits 0-9 and letters A-F.
Logic Levels
- High (1) and Low (0) represent binary states.
- Voltage levels define these states (e.g., TTL uses 0V as Low and +5V as High).
Logic Gates
- Basic Gates: AND, OR, NOT.
- Universal Gates: NAND, NOR.
- Other Gates: XOR, XNOR.
Boolean Algebra
- Laws: Commutative, Associative, Distributive, Identity, Null, Inverse.
- Simplification techniques.
Sum-of-Products (SOP) Method
- Logical expressions expressed as a sum (OR) of product terms (AND).
Product-of-Sums (POS) Method
- Logical expressions expressed as a product (AND) of sum terms (OR).
Truth Table to Karnaugh Map (K-Map)
- Simplifies Boolean expressions to reduce circuit complexity.
- Groups adjacent 1's in a grid to form simplified expressions.
2.2 Combinational and Arithmetic Circuits (AExE0202)
Combinational Circuits
- Output depends only on current inputs.
Multiplexer (MUX)
- Combines multiple inputs into one output based on select lines.
Demultiplexer (DEMUX)
- Splits one input into multiple outputs based on select lines.
Decoder and Encoder
- Decoder: Converts n-bit input into 2ⁿ unique outputs.
- Encoder: Converts 2ⁿ inputs into n-bit output.
Arithmetic Operations
- Binary Addition and Subtraction using logic gates.
- Operations on Unsigned and Signed Binary Numbers (e.g., 2’s complement for signed subtraction).
2.3 Sequential Logic Circuit (AExE0203)
Flip-Flops
- RS Flip-Flop: Stores 1-bit data. Basic bistable element.
- Gated Flip-Flop: Controlled by enable input.
- Edge-Triggered Flip-Flop: Activates on clock edge.
- Master-Slave Flip-Flop: Two stages (Master captures input; Slave updates output).
Registers
- Types: Shift Registers (Serial-In-Serial-Out, Serial-In-Parallel-Out, etc.).
- Applications: Data storage, transfer, and manipulation.
Counters
- Asynchronous Counters: Ripple effect; slower but simpler.
- Synchronous Counters: All bits change simultaneously; faster and more reliable.
2.4 Microprocessor (AExE0204)
Internal Architecture
- ALU, Control Unit, Registers, Buses (Data, Address, Control).
- Clock for synchronization.
Features
- Speed (measured in MHz/GHz), word length, power consumption, instruction set.
Assembly Language Programming
- Low-level language close to machine code.
- Use of mnemonics (e.g., MOV, ADD, SUB).
2.5 Microprocessor System (AExE0205)
Memory Device Classification and Hierarchy
- Types: Primary (RAM, ROM), Secondary (HDD, SSD), Cache, and Registers.
- Hierarchy: Registers > Cache > RAM > Secondary Storage.
I/O and Memory Interfacing
- Parallel Interface: Transmits multiple bits simultaneously.
- Serial Interface: Transmits data bit by bit (e.g., UART, SPI).
Programmable Peripheral Interface (PPI)
- Example: Intel 8255 for interfacing peripherals.
Transmission Methods
- Synchronous: Data transferred in sync with clock.
- Asynchronous: No fixed clock signal; uses start and stop bits.
Direct Memory Access (DMA)
- Bypasses CPU for high-speed data transfer between memory and peripherals.
- DMA Controllers: Manage data transfer independently.
2.6 Interrupt Operations (AExE0206)
Interrupt
- External or internal signal to CPU requesting attention.
Interrupt Service Routine (ISR)
- Special code executed in response to an interrupt.
Interrupt Processing
- Steps: Save current state, execute ISR, restore state, resume normal operation.